Comprising of clock sources, data converters, and sensor circuits, the product-proven, area efficient, high performance SiANA IP offering is designed for low power in TSMC's 40, 65, and 90-nm process nodes. The portfolio provides the essential building blocks for general purpose System-on-Chip (SoC) implementations, as well as precision subsystems for multimedia and communications.      

"With the new SiANA analog IP portfolio, Virage Logic can now provide the essential building blocks in a wide range of multimedia and communications analog systems," said Joshua Rom, vice president and general manager of Virage Logic's Analog Solutions business unit. "The offering includes analog IF interfaces suitable for 2.5G, 3G, GPS, DVB-T, DVB-H, S-DMB, WiFi, WiMAX, WHDi-1.5, WiBro, and other telephony and data communications, as well as CD quality audio and RGB, component, S-video, and composite video applications. Because these IP components were initially developed by Research and Development teams at NXP and Philips Electronics, the offering is product proven in a wide range of process nodes.  Because customization plays an essential role in the analog IP business, we provide integrated and hardened analog front-end blocks, delivering a single GDSII for audio, video or IF system solutions."      

"We named Virage Logic as our early development partner on the 40nm process node in 2007 and worked closely with them to ensure early adopter customers had access to quality IP when we first introduced our 40nm process," said Shauh-Teh Juang, senior director of Design Infrastructure Marketing Division at Taiwan Semiconductor Manufacturing Company Ltd. (TSMC). "The availability of a complete line of silicon proven 40nm analog IP underscores how our longstanding partnership with Virage Logic benefits our mutual customers."      

"Virage Logic's customers benefit from the convenience of working with a single broadline supplier of silicon-proven IP to help accelerate their SoC development. This now extends beyond the previous Virage Logic portfolio of memory-related IP to embrace analog functionality," said Rich Wawrzyniak, senior analyst for ASIC and SoC at Semico Research Corporation. "From a design point of view, the ability to obtain more highly-differentiated IP from a single source can reduce the time spent in finding and qualifying other IP vendors for the other functions every SoC needs. This also extends to the needs of the design team for obtaining support functions from the IP vendor after the initial licensing phase is over. Obtaining more varied, high-performance IP from a single source increases the efficiency of SoC design teams because they can concentrate their time on doing designs instead of hunting for the right IP to fit their needs."      

According to Semico Research Corporation, the Analog IP market grew 7.0 percent in the fourth quarter of 2009, recovering from a negative growth in the first half of the year. Semico believes the Analog IP market will show at least 15.0 percent growth for 2010 compared with the previous year and continue with strong positive growth through 2015. The rise in the use of Analog IP in complex SoC designs is attributable to the increasing need of these silicon solutions to move beyond purely digital functions and to interface more fully with the outside world, which is analog in nature. IP companies that have strong analog product portfolios are of increasing value to SoC design teams who must add more analog functionality to meet changing market requirements for their silicon solutions.      

The SiANA analog IP portfolio, based on a reusable portfolio started at Philips Electronics, later transferred to NXP and now part of Virage Logic, is optimized for low power applications and small die area. Delivering both low power and cost effective solutions, the SiANA analog IP offering is ideally suited to meet the requirements of such market segments as:     

• Consumer, such as digital TV, set-top boxes, MP3 players      
• Computer, such as TV tuner cards      
• Telecom, such as application engines and baseband interfaces for 2.5G, 3G, GPS, BT, DECT, TVoM, WiMAX, and WLAN      

The entire SiANA analog IP portfolio has been proven in silicon through test qualification programs and/or in volume production in Philips' or NXP's products. The same IP implementations are portable, as they have been ported over different technology nodes.      

The SiANA clock sources IP is targeted for application in SoCs and delivers outstanding and robust performance:      A low power, small area, multi-output-phase PLL for up to 320 MHz      

• Multi-purpose PLLs with frequencies up to 550 MHz, 1,100 MHz and 1,400 MHz with native supply, built-in SoC level power management support, the industry's lowest input frequency (as low as 32 kHz, ideally suited for MP3 player applications)      

Available in three different configurations: De-skew, Fractional-N and Spread Spectrum modulation      

The SiANA data conversion IP portfolio can serve a large number of applications optimally utilizing the advantages of high speed Successive Approximation Register (SAR), pipeline and Sigma-Delta architectures. The most commonly supported application domains are:     

• Audio input and output for Ultra Compact Audio/VoIP, Hi-Fi Audio and Enhanced Hi-Fi Audio      
• IF systems with input bandwidth requirements up to 10 MHz also supporting dedicated IQ configurations      
• Video streaming using RGB, Component, S-Video and Composite standards, and Measurement      
• Control applications (e.g. DC and touch screens)      

Because the SiANA sensor IP portfolio provides the SoC with vital data regarding temperature and supply voltage, the SoC can automatically regulate itself for the best performance within the current operating conditions.     

Availability and Pricing      

The SiANA product portfolio is available on a range of TSMC process nodes including: CLN65LP, CLN40LP, and CLN40G.      

Related link: www.viragelogic.com